? AUIRLS4030-7P g d s gate drain source base part number package type standard pack orderable part number form quantity AUIRLS4030-7P tube 50 AUIRLS4030-7P tape and reel left 800 auirls4030-7trl d 2 pak 7 pin v dss 100v r ds(on) typ. 3.2m ? max. 3.9m ? i d 190a absolute maximum ratings stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress ratings only; and functional operation of the device at these or any other condition beyond thos e indicated in the specificatio ns is not implied. exposure to absolute-maximum-rated conditions for exte nded periods may affect device reliability. the thermal resistan ce and power dissipation ratings are measured under board mounted and still air conditions. ambient temperature (ta) is 25c, unle ss otherwise specified. features ? optimized for logic level drive ? advanced process technology ? ultra low on-resistance ? logic level gate drive ? 175c operating temperature ? fast switching ? repetitive avalanche allowed up to tjmax ? lead-free, rohs compliant ? automotive qualified * description specifically designed for automotive applications, this hexfet? power mosfet utilizes the latest processing techniques to achieve extremely low on-resistance per sili con area. additional features of this design are a 175c junction operating temperature, fast switching speed and improved repetit ive avalanche rating . these features combine to make this design an extremely efficient and reliable device for use in automotive applications and a wide variety of other applications. 1 2015-11-6 ? hexfet? is a registered trademark of infineon. * qualification standards can be found at www.infineon.com ? automotive grade symbol parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v 190 a i d @ t c = 100c continuous drain current, v gs @ 10v 130 i dm pulsed drain current ? 750 p d @t c = 25c maximum power dissipation 370 w linear derating factor 2.5 w/c v gs gate-to-source voltage 16 v e as single pulse avalanche energy (thermally limited) ? 320 mj i ar avalanche current ? see fig.14,15, 22a, 22b a e ar repetitive avalanche energy ? mj dv/dt peak diode recovery ? 13 v/ns t j operating junction and -55 to + 175 ? t stg storage temperature range c ? soldering temperature, for 10 seconds (1.6mm from case) 300 ? thermal resistance ? symbol parameter typ. max. units r ? jc junction-to-case ?? ??? 0.40 c/w r ? ja junction-to-ambient ? ??? 40 d 2 pak 7 pin AUIRLS4030-7P hexfet ? power mosfet
? AUIRLS4030-7P 2 2015-11-6 notes: ? ? repetitive rating; pulse width limited by max. junction temperature. ? limited by t jmax, starting t j = 25c, l = 0.05mh, r g = 25 ? , i as = 110a, v gs =10v. part not recommended for use above this value. ? i sd ?? 110a, di/dt ?? 1520a/s, v dd ?? v (br)dss , t j ? 175c. ? pulse width ?? 400s; duty cycle ? 2%. ? c oss eff. (tr) is a fixed capacitance that gives the same c harging time as c oss while v ds is rising from 0 to 80% v dss . ? c oss eff. (er) is a fixed capacitance t hat gives the same energy as c oss while v ds is rising from 0 to 80% v dss . ? when mounted on 1" square pcb (fr-4 or g-10 material). fo r recommended footprint and soldering techniques refer to application note #an-994 ? r ? is measured at t j approximately 90c. ?? r ? jc value shown is at time zero. static @ t j = 25c (unless otherwise specified) parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage 100 ??? ??? v v gs = 0v, i d = 250a ? v (br)dss / ? t j breakdown voltage temp. coefficient ??? 0.10 ??? v/c reference to 25c, i d = 5ma ? r ds(on) static drain-to-source on-resistance ??? 3.2 3.9 m ??? v gs = 10v, i d = 110a ?? ??? 3.3 4.1 v gs = 4.5v, i d = 94a ?? v gs(th) gate threshold voltage 1.0 ??? 2.5 v v ds = v gs , i d = 250a gfs forward trans conductance 250 ??? ??? s v ds = 25v, i d = 110a i dss drain-to-source leakage current ??? ??? 20 a v ds = 100v, v gs = 0v ??? ??? 250 v ds = 100v,v gs = 0v,t j =125c i gss ? gate-to-source forward leakage ??? ??? 100 na ? v gs = 16v gate-to-source reverse leakage ??? ??? -100 v gs = -16v r g internal gate resistance ??? 2.0 ??? ?? dynamic electrical characteristics @ t j = 25c (unless otherwise specified) q g total gate charge ??? 93 140 nc ? i d = 110a q gs gate-to-source charge ??? 27 ??? v ds = 50v q gd gate-to-drain charge ??? 43 ??? v gs = 4.5v ? q sync total gate charge sync. (q g - q gd ) ??? 50 ??? t d(on) turn-on delay time ??? 53 ??? ns v dd = 65v t r rise time ??? 160 ??? i d = 110a t d(off) turn-off delay time ??? 110 ??? r g = 2.7 ?? t f fall time ??? 87 ??? v gs = 4.5v ? c iss input capacitance ??? 11490 ??? pf ? v gs = 0v c oss output capacitance ??? 680 ??? v ds = 50v c rss reverse transfer capacitance ??? 300 ??? ? = 1.0mhz c oss eff.(er) effective output capacitance (e nergy related) ??? 760 ??? v gs = 0v, v ds = 0v to 80v ? c oss eff.(tr) effective output capacitance (time related) ??? 1170 ??? v gs = 0v, v ds = 0v to 80v ? diode characteristics ? parameter min. typ. max. units conditions i s continuous source current ??? ??? 190 a mosfet symbol (body diode) showing the i sm pulsed source current ??? ??? 750 integral reverse (body diode) ??? p-n junction diode. v sd diode forward voltage ??? ??? 1.3 v t j = 25c,i s = 110a,v gs = 0v ?? t rr reverse recovery time ??? 53 ??? ns t j = 25c v dd = 85v ??? 63 ??? t j = 125c i f = 110a, q rr reverse recovery charge ??? 99 ??? nc t j = 25c di/dt = 100a/s ??? ??? 155 ??? t j = 125c ? i rrm reverse recovery current ??? 3.3 ??? a t j = 25c ? t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d )
? AUIRLS4030-7P 3 2015-11-6 fig. 2 typical output characteristics fig. 3 typical transfer characteristics fig. 1 typical output characteristics fig 5. typical capacitance vs. drain-to-source voltage fig 6. typical gate charge vs. gate-to-source voltage fig. 4 normalized on-resistance vs. temperature 0.1 1 10 100 1000 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 10v 5.0v 4.5v 4.0v 3.5v 3.0v 2.7v bottom 2.5v ? 60s pulse width tj = 25c 2.5v 0.1 1 10 100 1000 v ds , drain-to-source voltage (v) 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 2.5v ? 60s pulse width tj = 175c vgs top 10v 5.0v 4.5v 4.0v 3.5v 3.0v 2.7v bottom 2.5v 1 2 3 4 5 v gs , gate-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) t j = 25c t j = 175c v ds = 25v ?
? AUIRLS4030-7P 4 2015-11-6 ? fig 8. maximum safe operating area fig 10. drain-to-source breakdown voltage fig 11. typical c oss stored energy fig 12. maximum avalanche energy vs. drain current fig 9. maximum drain current vs. case temperature 0.0 0.5 1.0 1.5 2.0 v sd , source-to-drain voltage (v) 0.1 1 10 100 1000 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v 1 10 100 1000 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 10000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) operation in this area limited by r ds (on) tc = 25c tj = 175c single pulse 100sec 1msec 10msec dc 25 50 75 100 125 150 175 t c , case temperature (c) 0 20 40 60 80 100 120 140 160 180 200 i d , d r a i n c u r r e n t ( a ) fig. 7 typical source-to-drain diode forward voltage -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , temperature ( c ) 95 100 105 110 115 120 125 v ( b r ) d s s , d r a i n - t o - s o u r c e b r e a k d o w n v o l t a g e ( v ) id = 5ma -20 0 20 40 60 80 100 120 v ds, drain-to-source voltage (v) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 e n e r g y ( j ) 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 200 400 600 800 1000 1200 1400 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 12a 16a bottom 110a
? AUIRLS4030-7P 5 2015-11-6 ? fig 14. avalanche current vs. pulse width fig 13. maximum effective transient thermal impedance, junction-to-case fig 15. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 14, 15: (for further info, see an-1005 at www.infineon.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type. 2. safe operation in avalanc he is allowed as long as t jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 18a, 18b. 4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. ? t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 13, 14). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figures 13) p d (ave) = 1/2 ( 1.3bvi av ) = ? t/ z thjc i av = 2 ? t/ [1.3bvz th ] e as (ar) = p d (ave) t av 1e-006 1e-005 0.0001 0.001 0.01 0.1 t 1 , rectangular pulse duration (sec) 0.0001 0.001 0.01 0.1 1 t h e r m a l r e s p o n s e ( z t h j c ) c / w 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc ri (c/w) ? i (sec) ? 0.176 0.000343 0.227 0.006073 ? j ? j ? 1 ? 1 ? 2 ? 2 r 1 r 1 r 2 r 2 ? c ? c ci = ? i ? ri ci= ? i ? ri 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 tav (sec) 0.1 1 10 100 1000 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav, assuming ?? j = 25c and tstart = 150c. 0.01 allowed avalanche current vs avalanche pulsewidth, tav, assuming ? tj = 150c and tstart =25c (single pulse) 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 100 200 300 400 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 1. 0% duty cy c le i d = 110a
? AUIRLS4030-7P 6 2015-11-6 ? fig 16. threshold voltage vs. temperature fig. 18 - typical recovery current vs. di f /dt fig. 20 - typical stored charge vs. di f /dt fig. 17 - typical recovery current vs. di f /dt fig. 19 - typical stored charge vs. di f /dt -75 -50 -25 0 25 50 75 100 125 150 175 t j , temperature ( c ) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v g s ( t h ) , g a t e t h r e s h o l d v o l t a g e ( v ) i d = 250a i d = 1.0ma i d = 1.0a 0 200 400 600 800 1000 di f /dt (a/s) 0 5 10 15 20 25 30 i r r m ( a ) i f = 75a v r = 85v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/s) 0 5 10 15 20 25 30 i r r m ( a ) i f = 110a v r = 85v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/s) 0 200 400 600 800 1000 1200 1400 q r r ( n c ) i f = 75a v r = 85v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/s) 0 200 400 600 800 1000 1200 1400 1600 q r r ( n c ) i f = 110a v r = 85v t j = 25c t j = 125c
? AUIRLS4030-7P 7 2015-11-6 ? fig 21. peak diode recovery dv/dt test circuit for n-channel hexfet? power mosfets fig 22a. unclamped inductive test circuit fig 22b. unclamped inductive waveforms fig 23a. switching time test circuit fig 24a. gate charge test circuit fig 24b. gate charge waveform r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v t p v (br)dss i as fig 23b. switching time waveforms vds vgs id vgs(th) qgs1 qgs2 qgd qgodr
? AUIRLS4030-7P 8 2015-11-6 ? d 2 pak - 7 pin package outline (dimensions are shown in millimeters (inches)) note: for the most current drawing please refer to ir website at http://www.irf.com/package/ d 2 pak - 7 pin part marking information ywwa xx ? xx date code y= year ww= work week auirls4030-7 lot code part number ir logo
? AUIRLS4030-7P 9 2015-11-6 d 2 pak - 7 pin tape and reel note: for the most current drawing please refer to ir website at http://www.irf.com/package/
? AUIRLS4030-7P 10 2015-11-6 ? ? highest passing voltage. published by infineon technologies ag 81726 mnchen, germany ? infineon technologies ag 2015 all rights reserved. important notice the information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (?beschaffenheitsgarantie?). with respect to any examples , hints or any typical values stated herein and/or any information regarding the application of the product, infineon technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any thi rd party. in addition, any information given in this document is subject to customer?s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer ?s products and any use of the product of infineon technologies in customer?s applications. the data contained in this document is exclusively intended for technically trai ned staff. it is the responsibility of customer?s technical departments to evaluate the suit ability of the product for the intended application and the completeness of the product information given in this document with respect to such application. for further information on the product, technology, delivery terms and conditions and prices please contact your nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements products may contain danger ous substances. for information on the types in question please contact your nearest infineon technologies office. except as otherwise explicitly appr oved by infineon technologies in a written document signed by authorized representatives of infineon technologies, infineon technolog ies? products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. qualification information qualification level automotive (per aec-q101) comments: this part number(s) passed automotive qualification. infineon?s industrial and consumer qualification level is granted by extension of the higher automotive level. d 2 -pak 7 pin msl1 esd machine model class m4 (+/- 800v) ? aec-q101-002 human body model ? class h3a (+/- 6000v) ? aec-q101-001 charged device model class c5 (+/- 2000v) ? aec-q101-005 rohs compliant yes ? moisture sensitivity level ? revision history date comments 11/6/2015 ?? updated datasheet with corporate template ?? corrected ordering table on page 1. 4/2/2014 ?? updated package outline and part marking on page 8 & 9 ?? updated typo on the fig.19 and fig.20, unit of y-axis from "a" to "nc" on page 6. 3/3/2014 ?? added "logic level gate drive" bullet in the features section on page 1 ?? updated data sheet with new ir corporate template
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